blob: 1e2beadd0fe922f3ef2f9ab878dbc454348c8792 (plain
From 024a07bacf8287a6ddfa83e9d5b951c5e8b4070e Mon Sep 17 00:00:00 2001
From: =?utf8?q?Timo=20Ter=C3=A4s?= <email@example.com>
Date: Sun, 6 Jun 2010 15:38:47 -0700
Subject: [PATCH 1/1] r8169: fix random mdio_write failures
Content-Type: text/plain; charset=utf8
Some configurations need delay between the "write completed" indication
and new write to work reliably.
Realtek driver seems to use longer delay when polling the "write complete"
bit, so it waits long enough between writes with high probability (but
could probably break too). This patch adds a new udelay to make sure we
wait unconditionally some time after the write complete indication.
This caused a regression with XID 18000000 boards when the board specific
phy configuration writing many mdio registers was added in commit
2e955856ff (r8169: phy init for the 8169scd). Some of the configration
mdio writes would almost always fail, and depending on failure might leave
the PHY in non-working state.
Signed-off-by: Timo TerÃ¤s <firstname.lastname@example.org>
Acked-off-by: Francois Romieu <email@example.com>
Signed-off-by: David S. Miller <firstname.lastname@example.org>
drivers/net/r8169.c | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 217e709..03a8318 100644
@@ -559,6 +559,11 @@ static void mdio_write(void __iomem *ioaddr, int reg_addr, int value)
+ * Some configurations require a small delay even after the write
+ * completed indication or the next write might fail.
static int mdio_read(void __iomem *ioaddr, int reg_addr)