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-rw-r--r--main/xen/x86-msr-Shorten-ARCH_CAPABILITIES_-constants.patch71
1 files changed, 0 insertions, 71 deletions
diff --git a/main/xen/x86-msr-Shorten-ARCH_CAPABILITIES_-constants.patch b/main/xen/x86-msr-Shorten-ARCH_CAPABILITIES_-constants.patch
deleted file mode 100644
index 14a92178bc..0000000000
--- a/main/xen/x86-msr-Shorten-ARCH_CAPABILITIES_-constants.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 0825fbdd62724577febeff11ae50d440992a8f11 Mon Sep 17 00:00:00 2001
-From: Andrew Cooper <andrew.cooper3@citrix.com>
-Date: Fri, 3 May 2019 10:55:10 +0200
-Subject: [PATCH 1/2] x86/msr: Shorten ARCH_CAPABILITIES_* constants
-
-They are unnecesserily verbose, and ARCH_CAPS_* is already the more common
-version.
-
-Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
-Acked-by: Jan Beulich <jbeulich@suse.com>
-master commit: ba27aaa88548c824a47dcf5609288ee1c05d2946
-master date: 2019-03-18 16:26:40 +0000
----
- xen/arch/x86/spec_ctrl.c | 10 +++++-----
- xen/include/asm-x86/msr-index.h | 4 ++--
- 2 files changed, 7 insertions(+), 7 deletions(-)
-
-diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
-index e641894f17..27b1158d84 100644
---- a/xen/arch/x86/spec_ctrl.c
-+++ b/xen/arch/x86/spec_ctrl.c
-@@ -286,8 +286,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
- (_7d0 & cpufeat_mask(X86_FEATURE_L1D_FLUSH)) ? " L1D_FLUSH" : "",
- (_7d0 & cpufeat_mask(X86_FEATURE_SSBD)) ? " SSBD" : "",
- (e8b & cpufeat_mask(X86_FEATURE_IBPB)) ? " IBPB" : "",
-- (caps & ARCH_CAPABILITIES_IBRS_ALL) ? " IBRS_ALL" : "",
-- (caps & ARCH_CAPABILITIES_RDCL_NO) ? " RDCL_NO" : "",
-+ (caps & ARCH_CAPS_IBRS_ALL) ? " IBRS_ALL" : "",
-+ (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "",
- (caps & ARCH_CAPS_RSBA) ? " RSBA" : "",
- (caps & ARCH_CAPS_SKIP_L1DFL) ? " SKIP_L1DFL": "",
- (caps & ARCH_CAPS_SSB_NO) ? " SSB_NO" : "");
-@@ -598,7 +598,7 @@ static __init void l1tf_calculations(uint64_t caps)
- }
-
- /* Any processor advertising RDCL_NO should be not vulnerable to L1TF. */
-- if ( caps & ARCH_CAPABILITIES_RDCL_NO )
-+ if ( caps & ARCH_CAPS_RDCL_NO )
- cpu_has_bug_l1tf = false;
-
- if ( cpu_has_bug_l1tf && hit_default )
-@@ -662,9 +662,9 @@ int8_t __read_mostly opt_xpti_domu = -1;
- static __init void xpti_init_default(uint64_t caps)
- {
- if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
-- caps = ARCH_CAPABILITIES_RDCL_NO;
-+ caps = ARCH_CAPS_RDCL_NO;
-
-- if ( caps & ARCH_CAPABILITIES_RDCL_NO )
-+ if ( caps & ARCH_CAPS_RDCL_NO )
- {
- if ( opt_xpti_hwdom < 0 )
- opt_xpti_hwdom = 0;
-diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
-index d13308ffe0..7588fc1567 100644
---- a/xen/include/asm-x86/msr-index.h
-+++ b/xen/include/asm-x86/msr-index.h
-@@ -44,8 +44,8 @@
- #define PRED_CMD_IBPB (_AC(1, ULL) << 0)
-
- #define MSR_ARCH_CAPABILITIES 0x0000010a
--#define ARCH_CAPABILITIES_RDCL_NO (_AC(1, ULL) << 0)
--#define ARCH_CAPABILITIES_IBRS_ALL (_AC(1, ULL) << 1)
-+#define ARCH_CAPS_RDCL_NO (_AC(1, ULL) << 0)
-+#define ARCH_CAPS_IBRS_ALL (_AC(1, ULL) << 1)
- #define ARCH_CAPS_RSBA (_AC(1, ULL) << 2)
- #define ARCH_CAPS_SKIP_L1DFL (_AC(1, ULL) << 3)
- #define ARCH_CAPS_SSB_NO (_AC(1, ULL) << 4)
---
-2.20.1
-