aboutsummaryrefslogtreecommitdiffstats
path: root/main/xen/xsa297-4.11-2.patch
diff options
context:
space:
mode:
Diffstat (limited to 'main/xen/xsa297-4.11-2.patch')
-rw-r--r--main/xen/xsa297-4.11-2.patch54
1 files changed, 0 insertions, 54 deletions
diff --git a/main/xen/xsa297-4.11-2.patch b/main/xen/xsa297-4.11-2.patch
deleted file mode 100644
index 7c6c006223..0000000000
--- a/main/xen/xsa297-4.11-2.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From: Andrew Cooper <andrew.cooper3@citrix.com>
-Subject: x86/msr: Definitions for MSR_INTEL_CORE_THREAD_COUNT
-
-This is a model specific register which details the current configuration
-cores and threads in the package. Because of how Hyperthread and Core
-configuration works works in firmware, the MSR it is de-facto constant and
-will remain unchanged until the next system reset.
-
-It is a read only MSR (so unilaterally reject writes), but for now retain its
-leaky-on-read properties. Further CPUID/MSR work is required before we can
-start virtualising a consistent topology to the guest, and retaining the old
-behaviour is the safest course of action.
-
-Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
-Acked-by: Jan Beulich <jbeulich@suse.com>
-
-diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
-index b49fbd8..153f36b 100644
---- a/xen/arch/x86/msr.c
-+++ b/xen/arch/x86/msr.c
-@@ -180,6 +180,10 @@ int guest_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
- _MSR_MISC_FEATURES_CPUID_FAULTING;
- break;
-
-+ /*
-+ * TODO: Implement when we have better topology representation.
-+ case MSR_INTEL_CORE_THREAD_COUNT:
-+ */
- default:
- return X86EMUL_UNHANDLEABLE;
- }
-@@ -202,6 +206,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
- {
- uint64_t rsvd;
-
-+ case MSR_INTEL_CORE_THREAD_COUNT:
- case MSR_INTEL_PLATFORM_INFO:
- case MSR_ARCH_CAPABILITIES:
- /* Read-only */
-diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
-index 7588fc1..7cddfca 100644
---- a/xen/include/asm-x86/msr-index.h
-+++ b/xen/include/asm-x86/msr-index.h
-@@ -34,6 +34,10 @@
- #define EFER_KNOWN_MASK (EFER_SCE | EFER_LME | EFER_LMA | EFER_NX | \
- EFER_SVME | EFER_LMSLE | EFER_FFXSE)
-
-+#define MSR_INTEL_CORE_THREAD_COUNT 0x00000035
-+#define MSR_CTC_THREAD_MASK 0x0000ffff
-+#define MSR_CTC_CORE_MASK 0xffff0000
-+
- /* Speculation Controls. */
- #define MSR_SPEC_CTRL 0x00000048
- #define SPEC_CTRL_IBRS (_AC(1, ULL) << 0)