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-rw-r--r--main/xen/xsa297-4.11-4.patch55
1 files changed, 0 insertions, 55 deletions
diff --git a/main/xen/xsa297-4.11-4.patch b/main/xen/xsa297-4.11-4.patch
deleted file mode 100644
index e6acc9ed52..0000000000
--- a/main/xen/xsa297-4.11-4.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From: Andrew Cooper <andrew.cooper3@citrix.com>
-Subject: x86/spec-ctrl: Misc non-functional cleanup
-
- * Identify BTI in the spec_ctrl_{enter,exit}_idle() comments, as other
- mitigations will shortly appear.
- * Use alternative_input() and cover the lack of memory cobber with a further
- barrier.
-
-Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
-Reviewed-by: Jan Beulich <jbeulich@suse.com>
-
-diff --git a/xen/include/asm-x86/spec_ctrl.h b/xen/include/asm-x86/spec_ctrl.h
-index c846354..4983071 100644
---- a/xen/include/asm-x86/spec_ctrl.h
-+++ b/xen/include/asm-x86/spec_ctrl.h
-@@ -61,6 +61,8 @@ static always_inline void spec_ctrl_enter_idle(struct cpu_info *info)
- uint32_t val = 0;
-
- /*
-+ * Branch Target Injection:
-+ *
- * Latch the new shadow value, then enable shadowing, then update the MSR.
- * There are no SMP issues here; only local processor ordering concerns.
- */
-@@ -68,8 +70,9 @@ static always_inline void spec_ctrl_enter_idle(struct cpu_info *info)
- barrier();
- info->spec_ctrl_flags |= SCF_use_shadow;
- barrier();
-- asm volatile ( ALTERNATIVE(ASM_NOP3, "wrmsr", X86_FEATURE_SC_MSR_IDLE)
-- :: "a" (val), "c" (MSR_SPEC_CTRL), "d" (0) : "memory" );
-+ alternative_input(ASM_NOP3, "wrmsr", X86_FEATURE_SC_MSR_IDLE,
-+ "a" (val), "c" (MSR_SPEC_CTRL), "d" (0));
-+ barrier();
- }
-
- /* WARNING! `ret`, `call *`, `jmp *` not safe before this call. */
-@@ -78,13 +81,16 @@ static always_inline void spec_ctrl_exit_idle(struct cpu_info *info)
- uint32_t val = info->xen_spec_ctrl;
-
- /*
-+ * Branch Target Injection:
-+ *
- * Disable shadowing before updating the MSR. There are no SMP issues
- * here; only local processor ordering concerns.
- */
- info->spec_ctrl_flags &= ~SCF_use_shadow;
- barrier();
-- asm volatile ( ALTERNATIVE(ASM_NOP3, "wrmsr", X86_FEATURE_SC_MSR_IDLE)
-- :: "a" (val), "c" (MSR_SPEC_CTRL), "d" (0) : "memory" );
-+ alternative_input(ASM_NOP3, "wrmsr", X86_FEATURE_SC_MSR_IDLE,
-+ "a" (val), "c" (MSR_SPEC_CTRL), "d" (0));
-+ barrier();
- }
-
- #endif /* !__X86_SPEC_CTRL_H__ */