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path: root/main/oprofile/oprofile-pic.patch
blob: 8867ff243a0fbe2545db0f7c53294b077849b163 (plain) (blame)
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--- oprofile-0.9.6/libop/op_hw_specific.h
+++ oprofile-0.9.6.new/libop/op_hw_specific.h
@@ -20,7 +20,8 @@
 		char v[12];
 	} v;
 	unsigned eax;
-	asm("cpuid" : "=a" (eax), "=b" (v.b), "=c" (v.c), "=d" (v.d) : "0" (0));
+	asm("push %%ebx ; cpuid ; movl %%ebx, %%esi ; pop %%ebx" 
+	  : "=a" (eax), "=S" (v.b), "=c" (v.c), "=d" (v.d) : "0" (0));
 	return !strncmp(v.v, vnd, 12);
 }
 
@@ -46,7 +47,7 @@
 
 	if (!cpuid_vendor("GenuineIntel"))
 		return;
-	asm("cpuid" : "=a" (v.eax) : "0" (1) : "ecx","ebx","edx");
+	asm("push %%ebx; cpuid; pop %%ebx" : "=a" (v.eax) : "0" (1) : "ecx","edx");
 	model = (v.ext_model << 4) + v.model;
 	if (v.family != 6 || model != 26 || v.stepping > 4)
 		return;
@@ -57,7 +58,8 @@
 {
 	if (cpu_type == CPU_ARCH_PERFMON) { 
 		unsigned ebx, eax;
-		asm("cpuid" : "=a" (eax), "=b" (ebx) : "0" (0xa) : "ecx","edx");
+		asm("push %%ebx; cpuid; movl %%ebx, %%edx; pop %%ebx"
+		    : "=a" (eax), "=d" (ebx) : "0" (0xa) : "ecx");
 		workaround_nehalem_aaj79(&ebx);
 		return ebx & num_to_mask(eax >> 24);
 	}
@@ -68,7 +70,7 @@
 {
 	if (cpu_type == CPU_ARCH_PERFMON) {
 		unsigned v;
-		asm("cpuid" : "=a" (v) : "0" (0xa) : "ebx","ecx","edx");
+		asm("push %%ebx; cpuid; pop %%ebx" : "=a" (v) : "0" (0xa) : "ecx","edx");
 		return (v >> 8) & 0xff;
 	} 
 	return -1;
@@ -77,7 +79,7 @@
 static inline unsigned arch_get_counter_mask(void)
 {
 	unsigned v;
-	asm("cpuid" : "=a" (v) : "0" (0xa) : "ebx","ecx","edx");
+	asm("push %%ebx; cpuid; pop %%ebx" : "=a" (v) : "0" (0xa) : "ecx","edx");
 	return num_to_mask((v >> 8) & 0xff);	
 }